break;
case 4: /* CR4 */
- if ( value & ~mmu_cr4_features )
+ if ( value & HVM_CR4_GUEST_RESERVED_BITS )
{
- HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempts to enable unsupported "
- "CR4 features %lx (host %lx)",
- value, mmu_cr4_features);
+ HVM_DBG_LOG(DBG_LEVEL_1,
+ "Guest attempts to set reserved bit in CR4: %lx",
+ value);
svm_inject_exception(v, TRAP_gp_fault, 1, 0);
break;
}
case 4: /* CR4 */
old_cr = v->arch.hvm_vmx.cpu_shadow_cr4;
- if ( value & X86_CR4_RESERVED_BITS )
+ if ( value & HVM_CR4_GUEST_RESERVED_BITS )
{
HVM_DBG_LOG(DBG_LEVEL_1,
"Guest attempts to set reserved bit in CR4: %lx",
return hvm_funcs.event_injection_faulted(v);
}
-/* These bits in the CR4 are owned by the host */
+/* These bits in CR4 are owned by the host. */
#define HVM_CR4_HOST_MASK (mmu_cr4_features & \
(X86_CR4_VMXE | X86_CR4_PAE | X86_CR4_MCE))
+/* These bits in CR4 cannot be set by the guest. */
+#define HVM_CR4_GUEST_RESERVED_BITS \
+ ~(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | \
+ X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE | \
+ X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE | \
+ X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT)
+
/* These exceptions must always be intercepted. */
#define HVM_TRAP_MASK (1U << TRAP_machine_check)
#define X86_CR4_OSXMMEXCPT 0x0400 /* enable unmasked SSE exceptions */
#define X86_CR4_VMXE 0x2000 /* enable VMX */
-#define X86_CR4_RESERVED_BITS \
- ~(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | \
- X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE | \
- X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE | \
- X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)
-
/*
* Trap/fault mnemonics.
*/